Like past Core Ultra generations, the Core Ultra 3 chips use a chiplet-based approach, combining several distinct silicon tiles on a foundational “base tile” using Intel’s Foveros packaging technology. The compute tile houses the CPU cores and the neural processing unit (NPU), and it’s the piece that’s built using 18A—there are two version of this tile, one with a maximum of 16 CPU cores and one with 8. The platform controller tile, which handles most I/O, is still being built at TSMC, as is the high-end 12-core version of the graphics tile. A simpler four-core version of the graphics tile is being made using an older Intel 3 process,
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